1. Field of the Invention
The present invention relates to a method for recording a data signal containing a synchronous signal on a rewritable recording medium such as a phase-changing optical disk and an apparatus for recording and reproducing a data signal on and from the rewritable recording medium such as a phase-changing optical disk.
2. Description of the Related Art
There has been proposed a phase-changing optical disk as one of high-density recording mediums for repetitively rewriting data. The description will be oriented to the concrete technology of recording and reproducing a signal on and from this type of phase-changing optical disk.
FIG. 1 schematically illustrates a sector format of a data signal to be recorded on the phase-changing optical disk that is an example of a rewritable recording medium.
The data signal shown in FIG. l is recorded on sectors of an address area pre-formatted when manufacturing the optical disk. The address area contains the data indicating a physical address on the disk. When recording the data, the operation is executed to read the address signal recorded on this address area for accessing a target address and then to record the data signal formatted as shown in FIG. 1 on the timing based on the reproduction signal of the address area if the target address is reached.
In this data signal format, a predetermined continuous repetitive pattern called VFO is recorded at the head of the format. This VFO is a pattern on which the data signal can be reliably reproduced by varying an oscillation frequency of a phase locked loop (PLL) in reproducing the data signal. Hence, if the number of revolutions of the disk is variable, the data pattern allows the data signal to reliably be reproduced. The pattern contains many pieces of edge information, that is, short repetitive intervals, because the existence of many pieces of edge information is likely to execute the PLL pull-in operation with respect to this pattern.
An SYNC (synchronous pattern) following the VFO is a pattern used as a synchronous signal of the data area and utilizes a pattern that does not normally appear in the data. A DATA recorded after the SYNC indicates data containing data used by a user and additional information such as an ECC (error correcting code), control data, and RESYNC (resynchronous pattern).
FIG. 2 is a block diagram showing an example of a basic arrangement of a recording system provided in a general apparatus for recording and reproducing a signal.
In operation, when a pre-pit (pre-format) address pre-recorded and pre-formed on the disk is correctly detected, a timing generator 11 of a reproduction system operates to output an ID detection signal and initialize a timing generator 13 of a recording system. The recording system is controlled on various kinds of timings generated by the timing generator 13 so that the recording system can perform a recording operation according to a predetermined recording format.
Concretely, the timing generator 13 operates to supply various timing signals to a control unit (not shown), a selecting circuit 17, and a parallel/serial converter 18 and generate a recording gate (to be discussed below). This recording gate is a signal for limiting the recording range of the data on a time axis.
The selecting circuit 17 is inputted with the data from the control unit (not shown) through an interface unit 14 and with a SYNC pattern from a SYNC pattern generator 15 and a VFO pattern from a VFO pattern generator 16. The selecting circuit 17 operates to select one of these signals based on the timing signal sent from the timing generator 13 and supply it to the parallel/serial converter 18.
The parallel/serial converter 18 operates to parallel-to-serial convert the output from the selecting circuit 17 according to the output from the timing generator 13 and output the converted signal as recording data according to the format shown in FIG. 1.
The timing generator 11 of the reproduction system is inputted with the reproduction clock and the timing generator 13 of the recording system is inputted with the recording clock.
FIG. 3 is a block diagram showing an example of a basic arrangement of a reproduction system included in the conventional apparatus for recording and reproducing a signal, which corresponds to the recording system of the apparatus illustrated in FIG. 2. The components of FIG. 3 that are common to those of FIG. 2 have the same reference numbers as those of FIG. 2.
The reproduction system operates to detect any sector mark or a pre-pit address pre-recorded and pre-formed on a disk with an embossing technique for the purpose of predicting the location of the VFO or detect a reproduction RF signal for specifying the location of the VFO and to activate a phase-locked loop to pull the phase of the reproduction RF signal of the VFO. The timing generator of the reproducing system is initialized by detecting the pre-pit address (ID signal) pre-recorded and pre-formed on the disk and then is operated to predict the location of the SYNC and generate a SYNC detecting window signal. Then, if the SYNC is detected in the SYNC detecting window signal, the timing generator determines the synchronization is obtained and initializes the timing generator of the reproduction system for controlling the reproduction system. This timing generator of the reproduction system controls demodulation of data, serial/parallel conversion, interface with the control unit (not shown), and the like.
By detecting the reproduction RF signal, the location of the VFO is specified. Then, the PLL is activated for the reproduction RF signal of the VFO for detecting the SYNC after the VFO. Then, the detected SYNC pattern is used as a synchronous pattern.
In the operation of the reproduction system, when the PLL is locked to the VFO, the data is taken out of the reproduction RF signal for synchronous pull-in and data demodulation based on the detected SYNC. After the reproduction clock is extracted, the data reproduction is executed by using the reproduction clock.
Concretely, between when the reproduction is started and when the reproduction RF signal of the VFO is detected, the PLL is activated for the predetermined fixed pattern supplied from a fixed pattern generator 22 with, e.g., a crystal oscillator so that an internal clock is pre-oscillated at a frequency closing to a target.
When the reproduction RF signal of the VFO is detected, the PLL is activated for the reproduction RF signal for synchronously pulling the signal at fast speed. After the signal is pulled, it is effective to lower the gain of the PLL circuit, thereby reducing the possibility of unlocking the phase of the signal.
The reproduction RF signal read from the disk is subject to amplification and equalization through the effect of the RF reproducing unit 20. The processed signal is supplied to a RF detector 21 and a binary circuit 23.
The RF detector 21 operates to detect a RF reproduction signal of the VFO and supply the signal to the flip-flop 24 as a reset input. The binary circuit 23 operates to digitize the RF reproduction signal and supply it to a selecting circuit 25 and a data extracting unit 27.
The flip-flop 24 is inputted with the signal supplied from the RF detector 21 as a reset input and with the timing signal of the reproduction system supplied from the timing generator 13 of the recording system as a set input. When the RF detector 21 detects the reproduction RF signal, the flip-flop 24 is set. The output of the flip-flop 24 is supplied as a selecting signal to the selecting circuit 25.
The selecting circuit 25 is inputted with the output of a fixed pattern generator 22 and the output of the binary circuit 23. The selecting circuit 25 selects one of the inputs according to the selecting signal supplied from the flip-flop 24 and then supplies it to a PLL circuit 26.
The PLL circuit 26 operates to pull in the digitized RF reproduction signal supplied through the selecting circuit 25. The output of the PLL circuit 26 is served as a reproduction clock.
A data extracting unit 27 operates to extract the SYNC and the data area from the digitized RF reproduction signal supplied from the binary circuit 23 and then supply them to the SYNC detector 28 and a demodulator 29. The SYNC detector 28 operates to detect the SYNC from the RF reproduction signal supplied through the data extracting unit 27 and then supply it to an AND circuit 33.
The AND circuit 33 operates to generate an AND of the SYNC detected by the SYNC detector 28 and a SYNC detecting window supplied from the timing generator 13 of the recording system and then to supply the ANDed signal to the timing generator 11 of the reproduction system. The timing generator 11 is reset when the SYNC is correctly detected, that is, when the SYNC is detected in the SYNC detecting window.
The demodulator 29 operates to demodulate the RF reproduction signal supplied from the data extracting unit 27 and supply the demodulated output to the serial/parallel converter 31. The serial/parallel converter 31 operates to serial-to-parallel convert the demodulated RF reproduction signal and then supply it to a control unit (not shown) through the interface unit 32. In addition, the data extracting unit 27, the SYNC detector 28, the demodulator 29, and the serial/parallel converter 31 are inputted with the reproduction clock from the PLL circuit 26.
The aforementioned phase-changing optical disk is arranged to reversibly phase-change a recording material from an amorphous state to a crystalline state or vice versa for the purpose of recording and reproducing the digital data by using the difference of light reflectivity between these two states. Concretely, the focused laser beam is applied to a minute area of the recording material for heating the area so that the corresponding pits to the digital data to be recorded are formed on the minute area. In general, those pits are crystalline when the data is erased, while those pits are amorphous when the data is recorded. The phase change of the recording material is controlled by the power of the laser beam or the firing time of the beam.
It is known that this type of phase-changing optical disk is so degraded by thermal stress if the repetitive rewrite of data (overwrite) caused by heating with the laser beam that the endurance and the recording and reproducing characteristics are made lower. In particular, the recording start point of the data containing the phase pull-in pattern or the like is the same location inside of each sector of the disk, so that the repetitive rewrite of the same pattern results in degrading the disk.
In order to overcome this shortcoming, as disclosed in J-P-A-8-10489 (the Japanese Lying-open Hei 8-10489), there has been proposed a technology of changing the recording start point of the data at random.
The proposed invention is, however, arranged to simply overwrite on the recorded data the recording data whose recording start point is changed at random. Hence, in case the clock is extracted from the data for the phase pull-in when reproducing the recorded data, the phase pull-in may be executed for the recorded data. This may lead to an obstacle of taking reliable synchronization.
Herein, the description will be oriented to the conventional method for recording a signal in which the recording start point is shifted from a predetermined location at each recording operation.
FIG. 4 shows a recording timing (recording gate) appearing as the shift amount of the recording start point is changed from 0 (no shift) to 14.
The recording operation is executed in the range of those recording gates. According to the recording timing shown in FIG. 4, no change takes place in the width (time) of the recording gate if the shift amount of the recording start point is changed, while the overall recording gate is shifted on the time axis.
In the conventional method for recording a signal as shifting the recording start point, in general, the shift amount is selected at random when newly recording data, because it is impossible to grasp the shift amount of the recording start point about the data recorded in the past.
FIG. 5 shows an example of a basic arrangement of a recording system of the conventional apparatus for recording and reproducing a signal by using the recording timing on which the recording start point is shifted. This recording system has the substantially same arrangement as the conventional apparatus for recording and reproducing a signal as shown in FIG. 2, except that a recording start point shift timing generator 12 for determining a shift amount of the recording start point is located between the timing generator 11 of the reproduction system and the timing generator 13 of the recording system.
Concretely, the timing generator 11 of the reproduction system operates to generate an ID detection signal for initializing the timing generator 13 of the recording system when the pre-pit address pre-recorded and pre-formed on the disk is correctly detected and then supply the ID detection signal to the recording start point shift timing generator 12. The shift timing generator 12 operates to delay the ID detection signal by the time corresponding to the shift amount of the recording start point and then supply the delayed signal to the timing generator 13 of the recording system. The timing generator 13 of the recording system operates to generate various kinds of recording timing signals and recording gates.
A selecting circuit 17 is inputted with data from a control unit (not shown) through an interface unit 14 and with a SYNC pattern from a SYNC pattern generator 15 and a VFO pattern from a VFO pattern generator 16. Then, the selecting circuit 17 operates to select one of those signals based on the timing signal from the timing generator 13 of the recording system and then supply the selected signal to a parallel/serial converter 18.
The parallel/serial converter 18 operates to parallel-to-serial convert the output from the selecting circuit 17 into the output from the timing generator 13 of the recording system and then output the converted signal as the recording data according to the format shown in FIG. 1. By this operation, the overall recording gate is shifted on the time axis without changing the width of the recording gate and the recording start location on the disk is shifted accordingly.
FIG. 6 shows the state of the conventional data overwritten on the recorded data in the recording system shown in FIG. 5.
In the foregoing conventional method for recording a signal without shift of the recording start point, the data to be overwritten on the disk corresponds to the data starting from one VFO as shown in FIG. 1.
However, after the data is recorded at a shift amount=0, in case the data is sequentially overwritten in order of the shift amount=4 and a shift amount=10, the VFO 1 of the data previously recorded at the shift amount=0 and the VFO 2 of the data previously recorded at the shift amount=4 are left on the disk. Hence, the data actually recorded on the disk is started from each of VFO patterns as indicated in FIG. 6. For example, those VFO patterns contain a head of the VFO 1 recorded at the shift amount=0, a head of the VFO 2 recorded at the shift amount=4, and the VFO 3 recorded at the shift amount=10.
In reproducing the data overwritten at variable shift amounts, the location of the VFO may range from v1 to v2 shown in FIG. 6 depending on the shift amount used in recording the data. Hence, the PLL pull-in operating range for the range of the VFO is required to be widened. Likewise, the SYNC detecting window is also required to be widened from sl to s2.
The data to be reproduced is VFO 3, SYNC 3 and DATA 3 overwritten at the latest operation. In the case of detecting the reproduction RF signal for specifying the location of the VFO and enabling the PLL to pull the RF reproduction signal of the VFO for extracting the reproduction clock, the PLL circuit may pull the VFO 1 and the VFO 2 and then lower the gain of the PLL circuit for reducing the possibility of unlocking the VFO 1 and the VFO 2. In this case, the PLL circuit has difficulty in doing a pull-in operation for the VFO 3 to be originally locked.
Further, the pattern for the SYNC is a pattern that can be detected easily and as correctly as possible. If the SYNC pattern pseudoly appears as a result of generating an error in the VFO pattern or the data, this SYNC pattern may be erroneously detected. The widening of the SYNC detecting window from sl to s2 in correspondence with the shift of the recording start point is not preferable for increasing the probability of erroneously detecting the SYNC pattern.